Qualcomm Senior Staff Digital Design Engineer in Shanghai, China
Engineering Group, Engineering Group > ASICS Engineering
Digital - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as National Instrument (NI) products, LabVIEW, and MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C, PERL. Provides technical expertise for next generation initiatives.
Analog - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for next generation initiatives.
Bachelor's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, or related work experience.
Master's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, or related work experience.
PhD in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience.
• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
• 12+ years of ASIC design, verification, or related work experience.
• 3+ years of experience with architecture and design tools.
• 3 + years of experience with scripting tools and programming languages.
• 3 + years of experience with design verification methods.
• 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director and above).
Principal Duties and Responsibilities:
• Uses technical expertise with tools/applications (i.e., Cadence, RTL Compiler, etc.) to execute advanced architecture and design of multiple complex blocks and makes suggestions for design protocol.
• Leads the development of an implementation strategy that meets system requirements and customer needs for team.
• Works effectively with incomplete, ambiguous or conflicting requirements to successfully resolve complex architecture, design, or verification problems.
• Reviews the design and verification strategies of ASICs, SoC, and IP cores of team members and develops strategies for complex blocks or IC Packages.
• Reviews highly complex tests from more junior team members and completes own tests to ensure that bugs are fully understood and analyzed.
• Runs advanced power checks on multiple complex blocks to ensure design specifications are met; makes recommendations to leadership when specifications are not met.
• Reviews reports and oversees the process of interpreting reports derived from performance checks to ensure major issues are identified.
• Stays up to date on technical literature and technological advances and supports the creation of new technology.
• Writes, reviews, and edits own technical document in accordance with template and reviews and provides feedback on more junior engineers' documentation.
• Regularly communicates with key cross-functional groups (i.e., product management, program management teams) to determine product execution path and communicates this path to team
• Drives technical conversation in design or project reviews and project meetings to ensure team's progress on project tasks and best interests are represented.
• Acts as a tech lead on large projects and owns the outcome of the project.
• Learns and applies lessons from past projects; acts as a tech lead in the recommendation of improved and/or new engineering procedures.
Additional responsibilities might include:
• Uses technical expertise in Process, Device and Design Technology to help define and make available foundry technology roadmap choices to meet product requirements.
• Works with internal customers and foundry technology to define and develop competitive and timely foundry technology to fit product roadmap.
• Uses technical expertise in Process, Device and Design Technology and Data analysis tools to resolve issues to execute on timely Product ramp.
Level of Responsibility:
• Working independently with little supervision.
• Making decisions that are significant in impact; errors are not readily apparent due to the complexity of work process/product or time between decisions and results; errors typically result in significant expenditure of time, resources, and funds to correct.
• Using verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.
• Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).
• Completing tasks that require multiple steps that can be performed in various orders; tasks require simultaneously executing multiple cognitive abilities and maintaining information in short- or long-term memory.
• Exercising exceptional creativity to innovate new ideas and develop innovative products/processes without established objectives or known parameters.
• Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.
• Occasionally participates in strategic planning within own area affecting immediate operations.
The responsibilities of this role do not include:
• Financial accountability (e.g., does not involve budgeting responsibility).
Qualcomm i s co mmitted to hiring and supporting individuals with disabilities. Although this role has some expected physical activity, an inability to perform one or more of the listed physical requirements should not deter otherwise qualified applicants from applying. We will work with you throughout the application and onboarding process to provide reasonable accommodations. Examples of expected physical activity include: frequently transporting between offices, buildings, and campuses up to ½ mile; frequently transporting and installing equipment up to 5 lbs.; performing tasks at various heights (e.g., standing or sitting); monitoring and utilizing computers and test equipment for more than 6 hours a day; and continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.
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