Qualcomm Analog CAD Engineer - San Jose in San Jose, California

Job Description:

Job Id

E1967256

Job Title

Analog CAD Engineer - San Jose

Post Date

10/10/2018

Company


Division

Qualcomm Atheros Inc


Qualcomm Atheros at http://www.qualcomm.com/about/businesses/qca

Job Area

Engineering - Hardware

Location

California - San Jose

Job Overview

Qualcomm-Atheros is looking for a self-driven individual who enjoys working with engineers in various areas of design disciplines to solve design flow issues from analog front-end simulation to physical design verification and tapeout. Work with team members in United States and/or Asia to provide analog CAD support. Design, develop, and maintain analog CAD flow.

Responsibilities Include:

  • Maintain and enhance methodologies for chip assembly, device and parasitic extraction, transistor level simulation, and physical verification such as LVS and DRC

  • Customize foundry model files to accommodate design needs

  • Develop PCELLS PDK and flow for analog design

  • Set up transistor level simulation and mixed-signal simulation

  • Set up CAD environment for EDA tools and revision control system for design databases

  • Enhance and customize foundry rules decks for physical verification

  • Set up extraction flow for post layout simulation

  • Interface with and provide CAD support to engineers at multiple geographic sites.

  • Support all tools and methodologies for both back end (analog/digital layout tools, physical verification) and front end (transistor simulation and mixed mode simulation)

All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.

Minimum Qualifications

  • Bachelor's degree in Engineering, Information Systems, Computer Science or related field.

Preferred Qualifications

PhD or MSEE degree and school and/or internship experience with the following skills:

  • Read schematics and layout

  • Create circuit simulation test benches

  • CMOS process technology

  • Scripting languages in PERL, SHELL, and PYTHON

  • Experience with FinFETs

  • Understanding of analog EDA design and simulation tools.

  • RF design and simulation

  • Mixed signal simulation and setup

  • Write Verilog models of analog blocks

  • Create mixed signal test benches

  • Scripting languages in Cadence SKILL, and TCL

  • Knowledge of NIS, compute server and file server

Education Requirements

Required: Bachelor's degree in Engineering, Information Systems, Computer Science or related field.

Preferred: Master's, Electrical Engineering

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.