Qualcomm Display ASIC Design Engineer in Markham, Ontario
Qualcomm Canada ULC
Engineering Group, Engineering Group > ASICS Engineering
Digital - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as National Instrument (NI) products, LabVIEW, and MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C, PERL. Provides technical expertise for next generation initiatives.
Analog - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for next generation initiatives.
• Bachelor's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience.
Master's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, or related work experience.
PhD in Science, Engineering, or related field and 3+ years of ASIC design, verification, or related work experience.
• Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering.
• 8+ years ASIC design, verification, or related work experience.
• 2+ years experience with architecture and design tools.
• 2+ years experience with scripting tools and programming languages.
• 2+ years experience with design verification methods.
• 1+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Principal Duties & Responsibilities:
• Uses tools/applications (i.e., Cadence, RTL Compiler, etc.) to execute advanced architecture and design of multiple complex blocks and makes suggestions for design protocol.
• Develops an implementation strategy that meets system requirements and customer needs for team.
• Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems.
• Owns the design and verification strategies of ASICs, SoC, and IP cores, reviews the strategies of more junior team members and develops strategies for multiple blocks or IC Packages.
• Reviews complex tests from more junior team members and completes own tests to ensure that bugs are fully understood and analyzed.
• Runs advanced power checks on multiple blocks to ensure design specifications are met; makes recommendations to leadership when specifications are not met.
• Interprets the results of highly complex performance checks and reports them to team lead.
• Stays up to date on technical literature and technological advances and suggests areas for innovation.
• Writes, reviews, and edits own technical document in accordance with template and reviews and provides feedback on more junior engineers' documentation.
• Maintains regular communication with key team members to ensure continued alignment between team deliverables and product execution plan.
• Writes technical documentation and provides technical expertise for design or project reviews and project meetings to ensure team's best interest is represented.
• Acts as a tech lead on small to large projects and owns team deliverables of the project.
• Continually evaluates process used in team to facilitate effective work-flow for possible improvement. Additional responsibilities might include:
• Uses process technology expertise to help define module level choices for technology variants to meet product requirement.
• Owns development and delivery of robust technology process modules through test chip and product data analysis.
• Owns data mining and analysis of test chip and produce test data to resolve issues during technology development and ramp.
Level of Responsibility:
• Working independently with little supervision.
• Making decisions that are moderate in impact; errors may have financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct.
• Using verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.
• Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).
• Completing tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.
• Exercising substantial creativity to innovate new processes, procedures, or work products within guidelines or to achieve established objectives.
• Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.
• Occasionally participates in strategic planning within own area affecting immediate operations.
The responsibilities of this role do not include:
• Financial accountability (e.g., does not involve budgeting responsibility).
Qualcomm i s co mmitted to hiring and supporting individuals with disabilities. Although this role has some expected physical activity, an inability to perform one or more of the listed physical requirements should not deter otherwise qualified applicants from applying. We will work with you throughout the application and onboarding process to provide reasonable accommodations. Examples of expected physical activity include: frequently transporting between offices, buildings, and campuses up to ½ mile; frequently transporting and installing equipment up to 5 lbs.; performing tasks at various heights (e.g., standing or sitting); monitoring and utilizing computers and test equipment for more than 6 hours a day; and continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.
Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport
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