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Qualcomm ASIC Design Engineer - Compute DSP/AI Processor IP (all levels up to Staff) in Markham, Ontario

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Do you ever wonder when will connected devices become thinking devices? Be part of the group that is working on technology that will bring “Cognition” to all connected devices: That means devices that don’t just think, but instinctively react to their surroundings.

We are looking for an ASIC Design Engineer to be part of our team to innovate and design leading edge AI/video processing hardware IP for Qualcomm Snapdragon DSP processors. We are open to all levels of applicants, the role (Jr, Sr., Staff) and responsibility will be commensurate with experience.

As part of our team your responsibilities would include:

  • Design high speed, low power digital hardware solutions using SystemVerilog

  • Contribute to definition, micro-architecture and documentation of HW IP

  • Collaborate closely with the Verification team to test, debug and close coverage on the design

  • Write functional coverage and assertions using SystemVerilog

  • Evaluate synthesis results to verify the design meets the speed, power and area targets

  • Support internal hardware integration SW teams around the world

  • Resolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision

  • Use of various design tools (VCS Simulator, Synopsys Compiler , Linting, CDC, LEC, CLP etc.) to check and improve design quality

  • Provide ideas and further the innovation of ASICs, IP cores, and process flows

Minimum Qualifications

  • Strong problem solving and analytical thinking skills

  • Excellent communication skills

  • Self-motivated, goal oriented, team player

New Grad

  • Bachelors - Engineering, Computer Engineering

  • Understanding of digital logic

  • some design experience, whether in work, co-op, or coursework

Senior or above :

  • 2+ years of ASIC/FPGA design experience with Verilog

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.

OR

PhD in Science, Engineering, or related field.

Preferred Qualifications

New Grad

  • Previous experience / exposure to design via co-op, PEY or work term

Senior or above:

  • 2-20+ years of direct experience in ASIC design, debug verification, synthesis, SystemVerilog, design tools (Synopsys, Cadence, Mentor) and flows,

  • Understand high performance processor design for high speed and low power

Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport

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If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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