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Qualcomm ASIC Design Engineer, Audio (Junior to Senior Level) in Markham, Ontario


Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Interested in developing world-class audio solutions? Create products that deliver true-to-life clarity and high-fidelity audio for incredible acoustics. Our audio and voice user interface (UI) technologies offer a wide range of platforms designed to provide premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio applications.

Using your strong technical and teamwork skills, you will be responsible for overall development and/or integration of various design blocks. Other responsibilities include:

  • Work independently with little supervision

  • Develop module specifications and follow through with design and programming specifications

  • Model and analyze performance, area, power, and system cost tradeoffs for different micro-architectures

  • Implement modules and sub-systems in Verilog RTL

  • Develop and update technical documentation on an ongoing basis

  • Work closely with the design verification team to define verification methodology, review test plans and develop reference and bus-functional models

  • Implement and debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre- and post-silicon)

  • Develop and debug synthesis and timing constraints, review clocks, and layout to achieve netlist synthesis and static timing closure

  • Make significant contributions to silicon debug and analysis

Minimum Qualifications:

  • Ability to work legally in Canada

  • Professional or academic ASIC design and/or implementation experience

  • Proficiency with Verilog/VHDL RTL design languages

  • Strong communication (written and verbal) and collaboration skills

  • Good understanding of ASIC/VLSI concepts

  • Detail oriented with strong analytical and debugging skills

Preferred Qualifications (Nice to Have):

  • 4+ years of ASIC design related experience

  • Working knowledge of UPF specification

  • Experience with power analysis

  • Experience with High-speed/Low power ASIC design within a Unix environment

  • Experience with clock domain crossing techniques

  • Experience with the following design tools:

  • o ASIC design and simulation tool sets (Synopsys/Cadence Mentor - DC, PTPX, Power Compiler, Primetime, Modeltech, VCS, power theatre, etc.)

  • o Design rule check (Spyglass, etc.)

  • o Formal verification (Formality, LEC, etc.)

  • o Power analysis and simulation

  • o Scripting languages (PERL, Python, TCL, C, etc.)

  • Knowledge of bus interface protocols (APB, AHB, AXI)

  • Experience leading small technical teams

  • Experience with UVM

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport

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If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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