Qualcomm Senior Package SIPI Engineer in Hsinchu City, Taiwan
Qualcomm Semiconductor Limited
Engineering Group, Engineering Group > Packaging Engineering
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
The Qualcomm Package Electrical Team has an opening in the areas of signal integrity and power integrity. The candidate will work with package and IC designers to find ways to optimize the overall package design. The candidate’s responsibility is working with substrate designers to make sure all system level constraints are met prior to the package Tape-out. The candidate is expected to communicate with PHY owners to understand the Specs for various IPs such as PCIe, UFS, USB, MIPI, LPDDR, etc, and also with PCB designers to assess the impact of Ball assignment to the system level performance. This position offers the opportunity to work across multiple organizations such as PHY team, PCB team and PSIG and providing timely feedback and updating design guideline to the team is essential.
The responsibilities will include but not be limited to the following:
Perform package extraction for the time domain and frequency domain analysis
Perform system-level analysis for DDR, SerDes & Mixed signal interfaces
Provide design guidelines for the Package design
Develop design & analysis flow and automate the process
Create technical documentation and presentations
3+ years of experience in DDR/SerDes in Package/PCB/System Design related to mobile standards
Experience in Electromagnetics and solid background on transmission line theory & Crosstalk
Proficiency in field solvers such as HFSS, Q3D and Sentinel-PSI
Experience in simulation tools such as ADS and Hspice
Working knowledge in Cadence Allegro/APD/Sip or Mentor Xpedition
Experience in design specifications of HSIO such as PCIe, USB, UFS and MIPI(CSI, DSI)
Experience in Matlab to be able to automate existing simulation flow
Experience in scripting language(Perl/Python) is a plus
Master Degree with 3 4 years of experiences is preferred, Ph.D with minimal experience is considered as well
Experience in 2.5/3D Package Structure is a plus
Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport
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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
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