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Qualcomm IC Package Design Engineer in Austin, Texas


Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary

The IC Package System Design Team at Qualcomm has an opening for Package/System Design Engineer. This team is responsible for road mapping, architecting, design methodology, design implementation and verification for all Qualcomm package products (Digital, RF, Analog, PMIC, etc...). Job responsibilities for this position include package selection, package design, and package EE modeling. This involves optimizing system co-design of IC-PKG-PCB die keeping in mind package footprint/height constraints, IC floor-planning, PCB, high-speed signal integrity , power distribution network and thermal constraints.

Additional responsibilities:

  • IC top level floorplanning including hard macro block placement, padring, RDL and bump pattern/assignment

  • System level co-design methodology of IC, Package and PCB/Board

  • Concept analysis for new product package selection based on requirements for mechanical, thermal and electrical performance with the goal to achieve lowest system level cost

  • Package design flow methodology implementing high speed interface SI constraints for jitter, IR drop, cross-talk, and SSN specs

  • Package design flow methodology implementing power distribution network (PDN) constraints for high speed processor cores (1GHz+) including design optimization techniques at the die/pkg/PCB levels

  • Working with marketing/IC/product teams on competitive analysis and road mapping package technology for future products

Additional Requirements:

  • Experience in IO + PKG + PCB SI/PI modeling, co-simulation and analysis

  • Strong knowledge in 3D/2D EM simulation tool, electromagnetic theory and transmission line theory

  • Experience in IC package, SIP module and/or PCB selection, design and layout.

  • Experience in Pinmap optimization of optimal package, SIP module and/or PCB designs

  • Experience in IC, package, PCB co-design for system performance optimization.

  • Hands on experience with Cadence SIP and/or Mentor Xpedition.

  • Familiar with trade-offs among package cost, technologies, design, performance, power, and thermal requirements.

  • Familiar with assembly and substrate manufacturing process is a plus

Physical Requirements

• Frequently transports between offices, buildings, and campuses up to ½ mile.

• Frequently transports and installs equipment up to 5 lbs.

• Performs required tasks at various heights (e.g., standing or sitting).

• Monitors and utilizes computers and test equipment for more than 6 hours a day.

• Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.

Minimum Qualifications


Bachelors - Engineering, Bachelors - Science

Work Experiences:



Preferred Qualifications


Bachelors - Electrical Engineering

Work Experiences:

6+ months experience with design verification methods.



ASIC Verification, Matlab C, Multicore System-On-Chip (SoC), Perl Programming, Simulation Software

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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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